1. Field of the Invention
The present invention is generally in the field of electrical circuits. More particularly, the invention relates to driver circuits for use in plasma display panels.
2. Background Art
A Plasma Display Panel (PDP) uses plasma generated by a plurality of discharge cells to generate images. Each discharge cell typically includes an address electrode and first and second discharge electrodes (X and Y electrodes) between which a voltage is applied during operation of the PDP. The operation of the PDP is generally divided into frames of time, where the discharge cells are driven by controlling the electrodes during multiple reset periods, address periods, and sustain periods. For example, during reset and sustain periods one of the discharge electrodes can be driven by a voltage waveform including respective reset and sustain pulses. The reset pulse can comprise a slow sloping voltage while the sustain pulse can comprise a fast switching voltage. In various applications it may be desirable to allow for selection amongst multiple selectable slopes for the reset pulse.
In conventional PDPs, multiple slopes for the reset pulse have been implemented using separate general gate drivers for each particular reset pulse. Each general gate driver typically includes series connected switches configured to drive a transistor to implement the reset pulse. A respective resistor can be connected to each of the general gate drivers to set the slope of the reset pulse provided by the general gate driver and a capacitor can be connected across the gate and drain of the transistor. A separate general gate driver is also used to implement a sustain pulse as well as a separate transistor. Each general gate driver is contained within a separate integrated circuit (IC). In view of the foregoing, among other disadvantages, conventional approaches introduce substantial cost and consume a large amount of PCB space.